set_property -dict {PACKAGE_PIN AD12   IOSTANDARD DIFF_SSTL15} [get_ports clk_p]
set_property -dict {PACKAGE_PIN AD11   IOSTANDARD DIFF_SSTL15} [get_ports clk_n]
set_property -dict {PACKAGE_PIN M19    IOSTANDARD LVCMOS25} [get_ports rst_n]


# set_property -dict {PACKAGE_PIN AE24 IOSTANDARD LVCMOS33} [get_ports nor_wait]
# set_property -dict {PACKAGE_PIN AB24 IOSTANDARD LVCMOS33} [get_ports nor_adv_n]
# set_property -dict {PACKAGE_PIN AH24 IOSTANDARD LVCMOS33} [get_ports nor_ce_n]
# set_property -dict {PACKAGE_PIN AD23 IOSTANDARD LVCMOS33} [get_ports nor_oe_n]
# set_property -dict {PACKAGE_PIN AF22 IOSTANDARD LVCMOS33} [get_ports nor_we_n]
# 
# set_property -dict {PACKAGE_PIN AA23 IOSTANDARD LVCMOS33} [get_ports nor_wp_n]
# set_property -dict {PACKAGE_PIN AB22 IOSTANDARD LVCMOS33} [get_ports nor_clk]
# 
# 
# set_property -dict {PACKAGE_PIN Y29  IOSTANDARD LVCMOS33} [get_ports {nor_addr[0]}]
# set_property -dict {PACKAGE_PIN Y28  IOSTANDARD LVCMOS33} [get_ports {nor_addr[1]}]
# set_property -dict {PACKAGE_PIN W27  IOSTANDARD LVCMOS33} [get_ports {nor_addr[2]}]
# set_property -dict {PACKAGE_PIN AA27 IOSTANDARD LVCMOS33} [get_ports {nor_addr[3]}]
# set_property -dict {PACKAGE_PIN W28  IOSTANDARD LVCMOS33} [get_ports {nor_addr[4]}]
# set_property -dict {PACKAGE_PIN AB28 IOSTANDARD LVCMOS33} [get_ports {nor_addr[5]}]
# set_property -dict {PACKAGE_PIN W29  IOSTANDARD LVCMOS33} [get_ports {nor_addr[6]}]
# set_property -dict {PACKAGE_PIN AC27 IOSTANDARD LVCMOS33} [get_ports {nor_addr[7]}]
# set_property -dict {PACKAGE_PIN Y30  IOSTANDARD LVCMOS33} [get_ports {nor_addr[8]}]
# set_property -dict {PACKAGE_PIN Y25  IOSTANDARD LVCMOS33} [get_ports {nor_addr[9]}]
# set_property -dict {PACKAGE_PIN Y26  IOSTANDARD LVCMOS33} [get_ports {nor_addr[10]}]
# set_property -dict {PACKAGE_PIN AA30 IOSTANDARD LVCMOS33} [get_ports {nor_addr[11]}]
# set_property -dict {PACKAGE_PIN AG24 IOSTANDARD LVCMOS33} [get_ports {nor_addr[12]}]
# set_property -dict {PACKAGE_PIN AJ24 IOSTANDARD LVCMOS33} [get_ports {nor_addr[13]}]
# set_property -dict {PACKAGE_PIN AK25 IOSTANDARD LVCMOS33} [get_ports {nor_addr[14]}]
# set_property -dict {PACKAGE_PIN Y24  IOSTANDARD LVCMOS33} [get_ports {nor_addr[15]}]
# set_property -dict {PACKAGE_PIN Y23  IOSTANDARD LVCMOS33} [get_ports {nor_addr[16]}]
# set_property -dict {PACKAGE_PIN AH22 IOSTANDARD LVCMOS33} [get_ports {nor_addr[17]}]
# set_property -dict {PACKAGE_PIN AJ23 IOSTANDARD LVCMOS33} [get_ports {nor_addr[18]}]
# set_property -dict {PACKAGE_PIN Y21  IOSTANDARD LVCMOS33} [get_ports {nor_addr[19]}]
# set_property -dict {PACKAGE_PIN AJ22 IOSTANDARD LVCMOS33} [get_ports {nor_addr[20]}]
# set_property -dict {PACKAGE_PIN AK23 IOSTANDARD LVCMOS33} [get_ports {nor_addr[21]}]
# set_property -dict {PACKAGE_PIN AA25 IOSTANDARD LVCMOS33} [get_ports {nor_addr[22]}]
# set_property -dict {PACKAGE_PIN AF23 IOSTANDARD LVCMOS33} [get_ports {nor_addr[23]}]
# set_property -dict {PACKAGE_PIN AG22 IOSTANDARD LVCMOS33} [get_ports {nor_addr[24]}]
# set_property -dict {PACKAGE_PIN AK24 IOSTANDARD LVCMOS33} [get_ports {nor_addr[25]}]
# 
# 
# set_property -dict {PACKAGE_PIN AH20 IOSTANDARD LVCMOS33} [get_ports {nor_data[0]}]
# set_property -dict {PACKAGE_PIN AK20 IOSTANDARD LVCMOS33} [get_ports {nor_data[1]}]
# set_property -dict {PACKAGE_PIN AG20 IOSTANDARD LVCMOS33} [get_ports {nor_data[2]}]
# set_property -dict {PACKAGE_PIN AC22 IOSTANDARD LVCMOS33} [get_ports {nor_data[3]}]
# set_property -dict {PACKAGE_PIN AE20 IOSTANDARD LVCMOS33} [get_ports {nor_data[4]}]
# set_property -dict {PACKAGE_PIN AB20 IOSTANDARD LVCMOS33} [get_ports {nor_data[5]}]
# set_property -dict {PACKAGE_PIN AA20 IOSTANDARD LVCMOS33} [get_ports {nor_data[6]}]
# set_property -dict {PACKAGE_PIN AD21 IOSTANDARD LVCMOS33} [get_ports {nor_data[7]}]
# set_property -dict {PACKAGE_PIN AJ21 IOSTANDARD LVCMOS33} [get_ports {nor_data[8]}]
# set_property -dict {PACKAGE_PIN AK21 IOSTANDARD LVCMOS33} [get_ports {nor_data[9]}]
# set_property -dict {PACKAGE_PIN AF20 IOSTANDARD LVCMOS33} [get_ports {nor_data[10]}]
# set_property -dict {PACKAGE_PIN AF21 IOSTANDARD LVCMOS33} [get_ports {nor_data[11]}]
# set_property -dict {PACKAGE_PIN AE23 IOSTANDARD LVCMOS33} [get_ports {nor_data[12]}]
# set_property -dict {PACKAGE_PIN AC21 IOSTANDARD LVCMOS33} [get_ports {nor_data[13]}]
# set_property -dict {PACKAGE_PIN AE21 IOSTANDARD LVCMOS33} [get_ports {nor_data[14]}]
# set_property -dict {PACKAGE_PIN Y20  IOSTANDARD LVCMOS33} [get_ports {nor_data[15]}]
# 
# set_property -dict {PACKAGE_PIN AK28 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[0]}]
# set_property -dict {PACKAGE_PIN AK29 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[1]}]
# set_property -dict {PACKAGE_PIN AJ26 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[2]}]
# set_property -dict {PACKAGE_PIN AK26 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[3]}]
# set_property -dict {PACKAGE_PIN AJ27 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[4]}]
# set_property -dict {PACKAGE_PIN AK30 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[5]}]
# set_property -dict {PACKAGE_PIN AJ29 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[6]}]
# set_property -dict {PACKAGE_PIN AJ28 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[7]}]
# set_property -dict {PACKAGE_PIN AH30 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[8]}]
# set_property -dict {PACKAGE_PIN AH29 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[9]}]
# set_property -dict {PACKAGE_PIN AG30 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[10]}]
# set_property -dict {PACKAGE_PIN AG29 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[11]}]
# set_property -dict {PACKAGE_PIN AG28 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[12]}]
# set_property -dict {PACKAGE_PIN AF30 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[13]}]
# set_property -dict {PACKAGE_PIN AE30 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[14]}]
# set_property -dict {PACKAGE_PIN AF28 IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[15]}]

set_property -dict {PACKAGE_PIN AC29   IOSTANDARD LVCMOS33} [get_ports m_axis_tvalid]
set_property -dict {PACKAGE_PIN AF27   IOSTANDARD LVCMOS33} [get_ports m_axis_tlast]


set_property -dict {PACKAGE_PIN U29    IOSTANDARD LVCMOS25} [get_ports nor_wait]
set_property -dict {PACKAGE_PIN M30    IOSTANDARD LVCMOS25} [get_ports nor_adv_n]
set_property -dict {PACKAGE_PIN U19    IOSTANDARD LVCMOS25} [get_ports nor_ce_n]
set_property -dict {PACKAGE_PIN M24    IOSTANDARD LVCMOS25} [get_ports nor_oe_n]
set_property -dict {PACKAGE_PIN M25    IOSTANDARD LVCMOS25} [get_ports nor_we_n]


set_property -dict {PACKAGE_PIN W22    IOSTANDARD LVCMOS25} [get_ports {nor_addr[0]}]
set_property -dict {PACKAGE_PIN W21    IOSTANDARD LVCMOS25} [get_ports {nor_addr[1]}]
set_property -dict {PACKAGE_PIN V24    IOSTANDARD LVCMOS25} [get_ports {nor_addr[2]}]
set_property -dict {PACKAGE_PIN U24    IOSTANDARD LVCMOS25} [get_ports {nor_addr[3]}]
set_property -dict {PACKAGE_PIN V22    IOSTANDARD LVCMOS25} [get_ports {nor_addr[4]}]
set_property -dict {PACKAGE_PIN V21    IOSTANDARD LVCMOS25} [get_ports {nor_addr[5]}]
set_property -dict {PACKAGE_PIN U23    IOSTANDARD LVCMOS25} [get_ports {nor_addr[6]}]
set_property -dict {PACKAGE_PIN W24    IOSTANDARD LVCMOS25} [get_ports {nor_addr[7]}]
set_property -dict {PACKAGE_PIN W23    IOSTANDARD LVCMOS25} [get_ports {nor_addr[8]}]
set_property -dict {PACKAGE_PIN V20    IOSTANDARD LVCMOS25} [get_ports {nor_addr[9]}]
set_property -dict {PACKAGE_PIN V19    IOSTANDARD LVCMOS25} [get_ports {nor_addr[10]}]
set_property -dict {PACKAGE_PIN W26    IOSTANDARD LVCMOS25} [get_ports {nor_addr[11]}]
set_property -dict {PACKAGE_PIN V25    IOSTANDARD LVCMOS25} [get_ports {nor_addr[12]}]
set_property -dict {PACKAGE_PIN V30    IOSTANDARD LVCMOS25} [get_ports {nor_addr[13]}]
set_property -dict {PACKAGE_PIN V29    IOSTANDARD LVCMOS25} [get_ports {nor_addr[14]}]
set_property -dict {PACKAGE_PIN V27    IOSTANDARD LVCMOS25} [get_ports {nor_addr[15]}]
set_property -dict {PACKAGE_PIN P22    IOSTANDARD LVCMOS25} [get_ports {nor_addr[16]}]
set_property -dict {PACKAGE_PIN P21    IOSTANDARD LVCMOS25} [get_ports {nor_addr[17]}]
set_property -dict {PACKAGE_PIN N24    IOSTANDARD LVCMOS25} [get_ports {nor_addr[18]}]
set_property -dict {PACKAGE_PIN N22    IOSTANDARD LVCMOS25} [get_ports {nor_addr[19]}]
set_property -dict {PACKAGE_PIN N21    IOSTANDARD LVCMOS25} [get_ports {nor_addr[20]}]
set_property -dict {PACKAGE_PIN N20    IOSTANDARD LVCMOS25} [get_ports {nor_addr[21]}]
set_property -dict {PACKAGE_PIN N19    IOSTANDARD LVCMOS25} [get_ports {nor_addr[22]}]
set_property -dict {PACKAGE_PIN N26    IOSTANDARD LVCMOS25} [get_ports {nor_addr[23]}]
set_property -dict {PACKAGE_PIN M23    IOSTANDARD LVCMOS25} [get_ports {nor_addr[24]}]
set_property -dict {PACKAGE_PIN M22    IOSTANDARD LVCMOS25} [get_ports {nor_addr[25]}]


set_property -dict {PACKAGE_PIN P24    IOSTANDARD LVCMOS25} [get_ports {nor_data[0]}]
set_property -dict {PACKAGE_PIN R25    IOSTANDARD LVCMOS25} [get_ports {nor_data[1]}]
set_property -dict {PACKAGE_PIN R20    IOSTANDARD LVCMOS25} [get_ports {nor_data[2]}]
set_property -dict {PACKAGE_PIN R21    IOSTANDARD LVCMOS25} [get_ports {nor_data[3]}]
set_property -dict {PACKAGE_PIN T20    IOSTANDARD LVCMOS25} [get_ports {nor_data[4]}]
set_property -dict {PACKAGE_PIN T21    IOSTANDARD LVCMOS25} [get_ports {nor_data[5]}]
set_property -dict {PACKAGE_PIN T22    IOSTANDARD LVCMOS25} [get_ports {nor_data[6]}]
set_property -dict {PACKAGE_PIN T23    IOSTANDARD LVCMOS25} [get_ports {nor_data[7]}]
set_property -dict {PACKAGE_PIN U20    IOSTANDARD LVCMOS25} [get_ports {nor_data[8]}]
set_property -dict {PACKAGE_PIN P29    IOSTANDARD LVCMOS25} [get_ports {nor_data[9]}]
set_property -dict {PACKAGE_PIN R29    IOSTANDARD LVCMOS25} [get_ports {nor_data[10]}]
set_property -dict {PACKAGE_PIN P27    IOSTANDARD LVCMOS25} [get_ports {nor_data[11]}]
set_property -dict {PACKAGE_PIN P28    IOSTANDARD LVCMOS25} [get_ports {nor_data[12]}]
set_property -dict {PACKAGE_PIN T30    IOSTANDARD LVCMOS25} [get_ports {nor_data[13]}]
set_property -dict {PACKAGE_PIN P26    IOSTANDARD LVCMOS25} [get_ports {nor_data[14]}]
set_property -dict {PACKAGE_PIN R26    IOSTANDARD LVCMOS25} [get_ports {nor_data[15]}]

set_property -dict {PACKAGE_PIN AK28   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[0]}]
set_property -dict {PACKAGE_PIN AK29   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[1]}]
set_property -dict {PACKAGE_PIN AJ26   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[2]}]
set_property -dict {PACKAGE_PIN AK26   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[3]}]
set_property -dict {PACKAGE_PIN AJ27   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[4]}]
set_property -dict {PACKAGE_PIN AK30   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[5]}]
set_property -dict {PACKAGE_PIN AJ29   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[6]}]
set_property -dict {PACKAGE_PIN AJ28   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[7]}]
set_property -dict {PACKAGE_PIN AH30   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[8]}]
set_property -dict {PACKAGE_PIN AH29   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[9]}]
set_property -dict {PACKAGE_PIN AG30   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[10]}]
set_property -dict {PACKAGE_PIN AG29   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[11]}]
set_property -dict {PACKAGE_PIN AG28   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[12]}]
set_property -dict {PACKAGE_PIN AF30   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[13]}]
set_property -dict {PACKAGE_PIN AE30   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[14]}]
set_property -dict {PACKAGE_PIN AF28   IOSTANDARD LVCMOS33} [get_ports {m_axis_tdata[15]}]




create_debug_core u_ila_0 ila
set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0]
set_property ALL_PROBE_SAME_MU_CNT 1 [get_debug_cores u_ila_0]
set_property C_ADV_TRIGGER false [get_debug_cores u_ila_0]
set_property C_DATA_DEPTH 32768 [get_debug_cores u_ila_0]
set_property C_EN_STRG_QUAL false [get_debug_cores u_ila_0]
set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0]
set_property C_TRIGIN_EN false [get_debug_cores u_ila_0]
set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0]
set_property port_width 1 [get_debug_ports u_ila_0/clk]
connect_debug_port u_ila_0/clk [get_nets [list clk_gen_i/inst/CLK_OUT2]]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe0]
set_property port_width 4 [get_debug_ports u_ila_0/probe0]
connect_debug_port u_ila_0/probe0 [get_nets [list {control_testEx01/vio_reg[0]} {control_testEx01/vio_reg[1]} {control_testEx01/vio_reg[2]} {control_testEx01/vio_reg[3]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe1]
set_property port_width 16 [get_debug_ports u_ila_0/probe1]
connect_debug_port u_ila_0/probe1 [get_nets [list {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[0]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[1]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[2]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[3]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[4]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[5]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[6]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[7]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[8]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[9]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[10]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[11]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[12]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[13]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[14]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_in[15]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe2]
set_property port_width 16 [get_debug_ports u_ila_0/probe2]
connect_debug_port u_ila_0/probe2 [get_nets [list {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[0]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[1]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[2]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[3]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[4]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[5]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[6]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[7]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[8]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[9]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[10]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[11]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[12]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[13]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[14]} {remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_out[15]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe3]
set_property port_width 10 [get_debug_ports u_ila_0/probe3]
connect_debug_port u_ila_0/probe3 [get_nets [list {control_testEx01/cs[0]} {control_testEx01/cs[1]} {control_testEx01/cs[2]} {control_testEx01/cs[3]} {control_testEx01/cs[4]} {control_testEx01/cs[5]} {control_testEx01/cs[6]} {control_testEx01/cs[7]} {control_testEx01/cs[8]} {control_testEx01/cs[9]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe4]
set_property port_width 16 [get_debug_ports u_ila_0/probe4]
connect_debug_port u_ila_0/probe4 [get_nets [list {m_axis_tdata_OBUF[0]} {m_axis_tdata_OBUF[1]} {m_axis_tdata_OBUF[2]} {m_axis_tdata_OBUF[3]} {m_axis_tdata_OBUF[4]} {m_axis_tdata_OBUF[5]} {m_axis_tdata_OBUF[6]} {m_axis_tdata_OBUF[7]} {m_axis_tdata_OBUF[8]} {m_axis_tdata_OBUF[9]} {m_axis_tdata_OBUF[10]} {m_axis_tdata_OBUF[11]} {m_axis_tdata_OBUF[12]} {m_axis_tdata_OBUF[13]} {m_axis_tdata_OBUF[14]} {m_axis_tdata_OBUF[15]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe5]
set_property port_width 26 [get_debug_ports u_ila_0/probe5]
connect_debug_port u_ila_0/probe5 [get_nets [list {nor_addr_OBUF[0]} {nor_addr_OBUF[1]} {nor_addr_OBUF[2]} {nor_addr_OBUF[3]} {nor_addr_OBUF[4]} {nor_addr_OBUF[5]} {nor_addr_OBUF[6]} {nor_addr_OBUF[7]} {nor_addr_OBUF[8]} {nor_addr_OBUF[9]} {nor_addr_OBUF[10]} {nor_addr_OBUF[11]} {nor_addr_OBUF[12]} {nor_addr_OBUF[13]} {nor_addr_OBUF[14]} {nor_addr_OBUF[15]} {nor_addr_OBUF[16]} {nor_addr_OBUF[17]} {nor_addr_OBUF[18]} {nor_addr_OBUF[19]} {nor_addr_OBUF[20]} {nor_addr_OBUF[21]} {nor_addr_OBUF[22]} {nor_addr_OBUF[23]} {nor_addr_OBUF[24]} {nor_addr_OBUF[25]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe6]
set_property port_width 1 [get_debug_ports u_ila_0/probe6]
connect_debug_port u_ila_0/probe6 [get_nets [list m_axis_tvalid_OBUF]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe7]
set_property port_width 1 [get_debug_ports u_ila_0/probe7]
connect_debug_port u_ila_0/probe7 [get_nets [list nor_ce_n_OBUF]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe8]
set_property port_width 1 [get_debug_ports u_ila_0/probe8]
connect_debug_port u_ila_0/probe8 [get_nets [list remote_update_topEx01/nor_flash_commandEx01/nor_flash_coreEx01/nor_data_ctrl]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe9]
set_property port_width 1 [get_debug_ports u_ila_0/probe9]
connect_debug_port u_ila_0/probe9 [get_nets [list nor_oe_n_OBUF]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe10]
set_property port_width 1 [get_debug_ports u_ila_0/probe10]
connect_debug_port u_ila_0/probe10 [get_nets [list nor_we_n_OBUF]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe11]
set_property port_width 1 [get_debug_ports u_ila_0/probe11]
connect_debug_port u_ila_0/probe11 [get_nets [list nor_adv_n_OBUF]]
set_property C_CLK_INPUT_FREQ_HZ 300000000 [get_debug_cores dbg_hub]
set_property C_ENABLE_CLK_DIVIDER false [get_debug_cores dbg_hub]
set_property C_USER_SCAN_CHAIN 1 [get_debug_cores dbg_hub]
connect_debug_port dbg_hub/clk [get_nets clk_125m]
